NV3 configuration

There are several different ways that an NV3-based GPU can be configured, depending on the level of flexibility required and who is configuring it. Configuration is done at either the OEM card design level, the manufacture time of the chip, or at the VBIOS or driver level. Each of these have their own mechanisms for configuration; some appear to be burned into the silicon with a focused ion beam (FIB)-type technique, others use physical solder-bridged jumpers or other similar mechanisms at the board level, and others are done via software. In some cases, multiple of these methods are usable.

Configuration types

Manufacture-time configuration

Configuration can be done at manufacture time, presumably using chip level modification techniques such as focused ion beam (FIB), by the manufacturer. This kind of configuration encodes both chip-level configuration, such as the stepping, and information required for the graphics chip to communicate with other parts of the hardware, such as the size of the bus, the amount of VRAM connected and the type of VRAM connected to the bus.

PMC_BOOT_0

Main article: NV3 PMC#PMC_BOOT_0

PMC_BOOT_0 register bits

Bit range (high:low)	Name	Purpose	Values
3:0	FIB_REVISION	Focused ion beam chip modification revision. Presumably for modifying the chip to fix bugs after the die is manufactured	0 = revision 0 1 = revision 1 2 = revision 2 (NV3T, stepping A03/A04)
7:4	MASK_REVISION	Revision of the silicon die.	0 = revision A, RIVA 128 prototype (design finished late January 1997; tapeout March; first prototypes start of April 1997) 1 = revision B, RIVA 128 (already in production by week 33 of 1997) 2 = revision C, RIVA 128 ZX
15:8	IMPLEMENTATION	Variation of the architecture. This is actually an unused leftover from the NV1 era, where different versions were sold with slightly different functionality (in the case of the NV1, these were the NV0, NV1 with 32-bit DRAM, NV1 with 32-bit VRAM, and an NV1 with a "Picasso" 128-bit DAC), as well as scrapped plans for an audio-less STG-3000 later on.	0 = NV3
23:16	ARCHITECTURE	The version of the NV architecture.	0 = NV0 (never intended to use silicon?) 1 = NV1 2 = NV2 (cancelled) 3 = NV3 In practice only the value 3 will ever be used on NV3.
27:24	MANUFACTURER	Another NV1 remnant, from when the NV1 could either be branded as the SGS-Thomson STG-2000 (1, MANUFACTURER_SGS) or the Nvidia NV1 (0, MANUFACTURER_NV.	0 = Nvidia
31:28	FOUNDRY	The foundry partner that manufactured the GPU.	0 = SGS-Thomson/STMicroelectronics 1 = Helios 2 = TSMC (NV3T / Riva 128 ZX only)

PFB_BOOT_0

Main article: NV3 PFB#PFB_BOOT_0

The PFB_BOOT_0 provides configuration for the framebuffer interface. It is programmed at board manufacture time, as opposed to chip manufacture time; the configuration information provided by this register is used in order for the graphics chip to communicate with other parts of the hardware, such as the size of the bus, the amount of VRAM connected and the type of VRAM connected to the bus.

Caption text

Bit range (high:low)	Name	Purpose	Values
Example	Example	Example	Example
Example	Example	Example	Example
Example	Example	Example	Example
Example	Example	Example	Example