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Track the most recent changes to the wiki on this page.
List of abbreviations:
- D
- NvWiki edit
- N
- This edit created a new page (also see list of new pages)
- m
- This is a minor edit
- b
- This edit was performed by a bot
- (±123)
- The page size changed by this number of bytes
27 March 2026
25 March 2026
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N 21:15 | GPU Clocking 9 changes history +6,069 [Starfrost (9×)] | |||
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21:15 (cur | prev) −42 Starfrost talk contribs | ||||
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21:10 (cur | prev) +97 Starfrost talk contribs | ||||
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21:08 (cur | prev) +1,093 Starfrost talk contribs | ||||
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19:54 (cur | prev) +382 Starfrost talk contribs (Add PLL config 000d 2:0) | ||||
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17:23 (cur | prev) +527 Starfrost talk contribs | ||||
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17:15 (cur | prev) +1,187 Starfrost talk contribs | ||||
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17:06 (cur | prev) +662 Starfrost talk contribs | ||||
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17:02 (cur | prev) +1,465 Starfrost talk contribs | ||||
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14:47 (cur | prev) +698 Starfrost talk contribs (Created page with "Any electronic device needs a clock source to operate, and Nvidia GPUs are no exception. In early nVIDIA GPU's, the system of generating phase-locked loops (PLL) was a derivative that used by the SGS-Thomson STG-1764 "Van Gogh", which was used as the external RAMDAC on the NV1. Although which PLLs existed changed, the overall system implementation was very similar from NV1 until NV20. A partial break from this system was introduced with the implementation of mult...") | |||