GPU Clocking

Any electronic device needs a clock source to operate, and Nvidia GPUs are no exception. In early nVIDIA GPU's, the system of generating phase-locked loops (PLL) was a derivative that used by the SGS-Thomson STG-1764 "Van Gogh", which was used as the external RAMDAC on the NV1. Although which PLLs existed changed, the overall system implementation was very similar from NV1 until NV20. A partial break from this system was introduced with the implementation of multi-stage clocks in NV30 and a full break was achieved with NV40's implementation of clock domains^[1] ,

Notes

^ Used to allow different parts of the GPU core to run at different clock frequencies.