NV3 memory mapping - Revision history

https://nvwiki.org/index.php?action=history&feed=atom&title=NV3_memory_mapping NV3 memory mapping - Revision history 2026-05-13T17:04:35Z Revision history for this page on the wiki MediaWiki 1.43.1 https://nvwiki.org/index.php?title=NV3_memory_mapping&diff=616&oldid=prev Starfrost at 13:55, 6 August 2025 2025-08-06T13:55:49Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 13:55, 6 August 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l137">Line 137:</td> <td colspan="2" class="diff-lineno">Line 137:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is actually mapped, but is inside NV_USER or another write-only region:''' This always returns zero, except for how much space is left in the "virtual FIFO" abstraction for the channel and subchannel being written to. </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is actually mapped, but is inside NV_USER or another write-only region:''' This always returns zero, except for how much space is left in the "virtual FIFO" abstraction for the channel and subchannel being written to. </div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory does not map to any subsystem:''' You will get a repeating 32-bit pattern of garbage. This always seems to start as <code>0x20 0x07 0x20 0x07</code>, but unpredictably and very rapidly changes to a random set of values. It seems to be different for each subsystem; this is probably an artifact of how the memory controller works. Testing repeated reads from unmapped memory produces interesting behaviour - if there is no other part of the GPU attempting to assert the bus, a consistent garbage value based on what the graphics hardware was doing in the past will be produced. If it is, regions that are being accessed will (around 1 out of every 5 to 10,000 reads) very briefly turn to another garbage value before reverting to the original value. The cause of this behaviour is unknown, although it could be a form of open bus behaviour (just returning the last value read on the bus) like on older consoles, although, since the NV3 memory controller would seem to read the address first.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory does not map to any subsystem:''' You will get a repeating 32-bit pattern of garbage. This always seems to start as <code>0x20 0x07 0x20 0x07</code>, but unpredictably and very rapidly changes to a random set of values. It seems to be different for each subsystem; this is probably an artifact of how the memory controller works. Testing repeated reads from unmapped memory produces interesting behaviour - if there is no other part of the GPU attempting to assert the bus, a consistent garbage value based on what the graphics hardware was doing in the past will be produced. If it is, regions that are being accessed will (around 1 out of every 5 to 10,000 reads) very briefly turn to another garbage value before reverting to the original value. The cause of this behaviour is unknown, although it could be a form of open bus behaviour (just returning the last value read on the bus) like on older consoles, although, since the NV3 memory controller would seem to read the address first.</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>* '''If the memory address is <del style="font-weight: bold; text-decoration: none;">meant </del>to <del style="font-weight: bold; text-decoration: none;">be mapped </del>to a subsystem, but the subsystem does not actually exist:''' Your system will '''hard lock''' and will need to be power cycled (not by the power button, even hard reset will not work).</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>* '''If the memory address is <ins style="font-weight: bold; text-decoration: none;">intended </ins>to <ins style="font-weight: bold; text-decoration: none;">map </ins>to a subsystem, but the subsystem does not actually exist:''' Your system will '''hard lock''' and will need to be power cycled (not by the power button, even hard reset will not work).</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== PPMI ===</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== PPMI ===</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>PPMI <del style="font-weight: bold; text-decoration: none;">(Performance Monitoring and Instrumentation?) </del>is a subsystem for <del style="font-weight: bold; text-decoration: none;">performance monitoring that </del>does not expose any registers<del style="font-weight: bold; text-decoration: none;">. It may be a leftover of </del>the <del style="font-weight: bold; text-decoration: none;">development process and may </del>not <del style="font-weight: bold; text-decoration: none;">actually exist</del>.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>PPMI is a subsystem <ins style="font-weight: bold; text-decoration: none;">that controls both PTIMER and the bus mastering system. It is critical </ins>for <ins style="font-weight: bold; text-decoration: none;">operation but </ins>does not expose any registers<ins style="font-weight: bold; text-decoration: none;">; turning it off will immediately crash </ins>the <ins style="font-weight: bold; text-decoration: none;">system since bus requests will </ins>not <ins style="font-weight: bold; text-decoration: none;">be able to be serviced properly</ins>.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Notes ==</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Notes ==</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>{{Note|a}} Repeated from <code>0x1900-0x19FF</code> due to incomplete address decoding</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>{{Note|a}} Repeated from <code>0x1900-0x19FF</code> due to incomplete address decoding</div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_memory_mapping&diff=243&oldid=prev Starfrost at 10:24, 30 June 2025 2025-06-30T10:24:34Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 10:24, 30 June 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l136">Line 136:</td> <td colspan="2" class="diff-lineno">Line 136:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is inside an area that, while not mapped to a register, is mapped to a real GPU subsystem:''' Repeat a register. The length of the repeat is variable and may depend on how many bits inside the GPU logic are used internally to "select" a subsystem's registers. </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is inside an area that, while not mapped to a register, is mapped to a real GPU subsystem:''' Repeat a register. The length of the repeat is variable and may depend on how many bits inside the GPU logic are used internally to "select" a subsystem's registers. </div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is actually mapped, but is inside NV_USER or another write-only region:''' This always returns zero, except for how much space is left in the "virtual FIFO" abstraction for the channel and subchannel being written to. </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is actually mapped, but is inside NV_USER or another write-only region:''' This always returns zero, except for how much space is left in the "virtual FIFO" abstraction for the channel and subchannel being written to. </div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory does not map to any subsystem:''' You will get a repeating 32-bit pattern of garbage. This always seems to start as <code>0x20 0x07 0x20 0x07</code>, but unpredictably and very rapidly changes to a random set of values. It seems to be different for each subsystem, <del style="font-weight: bold; text-decoration: none;">or may change </del>very <del style="font-weight: bold; text-decoration: none;">quickly, faster than nvplayground can dump it</del>. The cause of this behaviour is unknown, although it could be a form of open bus behaviour (just returning the last value read on the bus) like on older consoles, although, since the NV3 memory controller would seem to read the address first.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory does not map to any subsystem:''' You will get a repeating 32-bit pattern of garbage. This always seems to start as <code>0x20 0x07 0x20 0x07</code>, but unpredictably and very rapidly changes to a random set of values. It seems to be different for each subsystem<ins style="font-weight: bold; text-decoration: none;">; this is probably an artifact of how the memory controller works. Testing repeated reads from unmapped memory produces interesting behaviour - if there is no other part of the GPU attempting to assert the bus</ins>, <ins style="font-weight: bold; text-decoration: none;">a consistent garbage value based on what the graphics hardware was doing in the past will be produced. If it is, regions that are being accessed will (around 1 out of every 5 to 10,000 reads) </ins>very <ins style="font-weight: bold; text-decoration: none;">briefly turn to another garbage value before reverting to the original value</ins>. The cause of this behaviour is unknown, although it could be a form of open bus behaviour (just returning the last value read on the bus) like on older consoles, although, since the NV3 memory controller would seem to read the address first.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the memory address is meant to be mapped to a subsystem, but the subsystem does not actually exist:''' Your system will '''hard lock''' and will need to be power cycled (not by the power button, even hard reset will not work).</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the memory address is meant to be mapped to a subsystem, but the subsystem does not actually exist:''' Your system will '''hard lock''' and will need to be power cycled (not by the power button, even hard reset will not work).</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_memory_mapping&diff=226&oldid=prev Starfrost at 10:16, 1 June 2025 2025-06-01T10:16:01Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 10:16, 1 June 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l1">Line 1:</td> <td colspan="2" class="diff-lineno">Line 1:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>Understanding the memory mapping of the NV3 is critical for understanding its overall operation.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>Understanding the memory mapping of the NV3 is critical for understanding its overall operation.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>The memory mapping architecture is implemented internally by the NV3 on-die memory controller and exposed to the user via the configuration register interface of the Peripheral Connect Interface (PCI) bus and its siblings and successors, such as AGP (or in later models, PCIe). Two of the maximum <del style="font-weight: bold; text-decoration: none;">fsix </del>base address registers are exposed using this mechanism, BAR0 and BAR1; BAR2 is claimed to exist by some sources, including envytools, but doesn't seem to actually exist. BAR0 contains a gigantic slab (16MB) of MMIO containing all of the GPU's registers, and BAR1, also 16MB, contains both a copy of the current framebuffer (or all of VRAM?) for [[NV3 DFB|dumb framebuffer]] use, and, at <code>0xC00000</code>, [[NV3 RAMIN|instance memory]] mapped as it is intended to be addressed.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>The memory mapping architecture is implemented internally by the NV3 on-die memory controller and exposed to the user via the configuration register interface of the Peripheral Connect Interface (PCI) bus and its siblings and successors, such as AGP (or in later models, PCIe). Two of the maximum <ins style="font-weight: bold; text-decoration: none;">of six </ins>base address registers are exposed using this mechanism, BAR0 and BAR1; BAR2 is claimed to exist by some sources, including envytools, but doesn't seem to actually exist. BAR0 contains a gigantic slab (16MB) of MMIO containing all of the GPU's registers, and BAR1, also 16MB, contains both a copy of the current framebuffer (or all of VRAM?) for [[NV3 DFB|dumb framebuffer]] use, and, at <code>0xC00000</code>, [[NV3 RAMIN|instance memory]] mapped as it is intended to be addressed.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Memory mapping ==</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Memory mapping ==</div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_memory_mapping&diff=225&oldid=prev Starfrost at 10:15, 1 June 2025 2025-06-01T10:15:25Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 10:15, 1 June 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l18">Line 18:</td> <td colspan="2" class="diff-lineno">Line 18:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x1800</code> || <code>0x18FF</code> || <code>[[NV3 configuration#PCI configuration registers|PCI config space mirror]]</code> || PCI configuration for exposing the GPU to the rest of the machine, including vendor and device IDs, BARs for MMIO and VRAM mapping by the OS and various other characteristics. Technically a part of <code>PBUS</code> {{ref|a|}} </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x1800</code> || <code>0x18FF</code> || <code>[[NV3 configuration#PCI configuration registers|PCI config space mirror]]</code> || PCI configuration for exposing the GPU to the rest of the machine, including vendor and device IDs, BARs for MMIO and VRAM mapping by the OS and various other characteristics. Technically a part of <code>PBUS</code> {{ref|a|}} </div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x2000</code> || <code>0x3FFF</code> || <code>[[NV3 PFIFO|PFIFO]]</code> || FIFO buffer using Gray code indexing; allows objects to be submitted in one of two caches (the one-entry CACHE0 used for software method injection and the 32 or 64 (NV3T)-deep CACHE1), storing them in a queue their methods can be executed; supports up to 8 DMA channels for object submission with 8 subchannels each, "context switching" is needed (see RAMFC) to change which DMA channel is selected. This area also has the configuration registers for the various control structures - [[NV3 RAMHT|RAMHT]], [[NV3 RAMRO|RAMRO]] and [[NV3 RAMFC|RAMFC]] can all have their addresses and sizes here.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x2000</code> || <code>0x3FFF</code> || <code>[[NV3 PFIFO|PFIFO]]</code> || FIFO buffer using Gray code indexing; allows objects to be submitted in one of two caches (the one-entry CACHE0 used for software method injection and the 32 or 64 (NV3T)-deep CACHE1), storing them in a queue their methods can be executed; supports up to 8 DMA channels for object submission with 8 subchannels each, "context switching" is needed (see RAMFC) to change which DMA channel is selected<ins style="font-weight: bold; text-decoration: none;">, and registers here are used for the DMA object submission method (which requires software support to function)</ins>. This area also has the configuration registers for the various control structures - [[NV3 RAMHT|RAMHT]], [[NV3 RAMRO|RAMRO]] and [[NV3 RAMFC|RAMFC]] can all have their addresses and sizes here.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x4000</code> || <code>0x5FFF</code> || <code>[[PRM|PRM]]</code> || Legacy Sound Blaster/MPU-401 support on MS-DOS</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x4000</code> || <code>0x5FFF</code> || <code>[[PRM|PRM]]</code> || Legacy Sound Blaster/MPU-401 support on MS-DOS</div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_memory_mapping&diff=224&oldid=prev Starfrost at 10:14, 1 June 2025 2025-06-01T10:14:16Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 10:14, 1 June 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l94">Line 94:</td> <td colspan="2" class="diff-lineno">Line 94:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x680000</code> || <code>0x6802FF</code> || <code>[[NV3 PVIDEO|PVIDEO]]</code> (part of <code>PDAC</code>) || Video overlay control; controls current state of RAMDAC and video output; controls how GPU communicates with RAMDAC.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x680000</code> || <code>0x6802FF</code> || <code>[[NV3 PVIDEO|PVIDEO]]</code> (part of <code>PDAC</code>) || Video overlay control; controls current state of RAMDAC and video output; controls how GPU communicates with RAMDAC.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x680300</code> || <code>0x680FFF</code> || <code>[[NV3 PRAMDAC|PRAMDAC]]</code> || RAMDAC: Converts framebuffer to analog signal for display; display parameters (e.g. vblank); clock generation for GPU core and VRAM (<code>MPLL</code>) and pixel clock for driving a CRT (<code>VPLL</code>) 15bpp non-alpha blended hardware cursor (the cursor itself is stored in RAMIN); test registers; palette and colour output control, including 5-6-5 mode for true 16bpp operation instead of 5-5-5 15bpp.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x680300</code> || <code>0x680FFF</code> || <code>[[NV3 PRAMDAC|PRAMDAC]]</code> <ins style="font-weight: bold; text-decoration: none;">(part of <code>PDAC</code>) </ins>|| RAMDAC: Converts framebuffer to analog signal for display; display parameters (e.g. vblank); clock generation for GPU core and VRAM (<code>MPLL</code>) and pixel clock for driving a CRT (<code>VPLL</code>) 15bpp non-alpha blended hardware cursor (the cursor itself is stored in RAMIN); test registers; palette and colour output control, including 5-6-5 mode for true 16bpp operation instead of 5-5-5 15bpp.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x681200</code> || <code>0x6813FF</code> || <code>[[NV3 PRAMDAC#User DAC area|USER_DAC]] || DAC registers intended for the user - indexed colour mode palette and pixel mask</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x681200</code> || <code>0x6813FF</code> || <code>[[NV3 PRAMDAC#User DAC area|USER_DAC]] || DAC registers intended for the user - indexed colour mode palette and pixel mask</div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_memory_mapping&diff=223&oldid=prev Starfrost at 10:13, 1 June 2025 2025-06-01T10:13:56Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 10:13, 1 June 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l46">Line 46:</td> <td colspan="2" class="diff-lineno">Line 46:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x400648</code> (index) || <code>0x40064C</code> (address/data) || <code>[[NV3 DPRAM|DPRAM]]</code> || Internal port (as part of <code>PGRAPH</code>) to access on-die texture and vertex cache (12 KB)</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x400648</code> (index) || <code>0x40064C</code> (address/data) || <code>[[NV3 DPRAM|DPRAM]]</code> || Internal port (as part of <code>PGRAPH</code>) to access on-die texture and vertex cache (12 KB)</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x410000</code> || <code>0x411FFF</code> || <code>[[NV3 graphics objects#UBETA|UBETA]]</code> || Internal write-only registers used <del style="font-weight: bold; text-decoration: none;">to execute </del>methods for the beta factor object</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x410000</code> || <code>0x411FFF</code> || <code>[[NV3 graphics objects#UBETA|UBETA]]</code> || Internal write-only registers used <ins style="font-weight: bold; text-decoration: none;">while executing </ins>methods for the beta factor object</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x420000</code> || <code>0x421FFF</code> || <code>[[NV3 graphics objects#UROP|UROP]]</code> || Internal write-only registers used <del style="font-weight: bold; text-decoration: none;">to execute </del>methods for the GDI ternary ROP object</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x420000</code> || <code>0x421FFF</code> || <code>[[NV3 graphics objects#UROP|UROP]]</code> || Internal write-only registers used <ins style="font-weight: bold; text-decoration: none;">while executing </ins>methods for the GDI ternary ROP object</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x430000</code> || <code>0x431FFF</code> || <code>[[NV3 graphics objects#UCHROMA|UCHROMA]]</code> || Internal write-only registers used while executing methods for the chroma key object</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x430000</code> || <code>0x431FFF</code> || <code>[[NV3 graphics objects#UCHROMA|UCHROMA]]</code> || Internal write-only registers used while executing methods for the chroma key object</div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_memory_mapping&diff=222&oldid=prev Starfrost at 10:13, 1 June 2025 2025-06-01T10:13:29Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 10:13, 1 June 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l136">Line 136:</td> <td colspan="2" class="diff-lineno">Line 136:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is inside an area that, while not mapped to a register, is mapped to a real GPU subsystem:''' Repeat a register. The length of the repeat is variable and may depend on how many bits inside the GPU logic are used internally to "select" a subsystem's registers. </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is inside an area that, while not mapped to a register, is mapped to a real GPU subsystem:''' Repeat a register. The length of the repeat is variable and may depend on how many bits inside the GPU logic are used internally to "select" a subsystem's registers. </div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is actually mapped, but is inside NV_USER or another write-only region:''' This always returns zero, except for how much space is left in the "virtual FIFO" abstraction for the channel and subchannel being written to. </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is actually mapped, but is inside NV_USER or another write-only region:''' This always returns zero, except for how much space is left in the "virtual FIFO" abstraction for the channel and subchannel being written to. </div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory does not map to any subsystem:''' You will get a repeating 32-bit pattern of garbage. This always seems to start as <code>0x20 0x07 0x20 0x07</code>, but unpredictably and very rapidly changes to a random set of values. It seems to be different for each subsystem, or may change very quickly, faster than nvplayground can <del style="font-weight: bold; text-decoration: none;">dyno ut</del>. The cause of this behaviour is unknown, although it could be a form of open bus behaviour (just returning the last value read on the bus) like on older consoles, although, since the NV3 memory controller would seem to read the address first.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory does not map to any subsystem:''' You will get a repeating 32-bit pattern of garbage. This always seems to start as <code>0x20 0x07 0x20 0x07</code>, but unpredictably and very rapidly changes to a random set of values. It seems to be different for each subsystem, or may change very quickly, faster than nvplayground can <ins style="font-weight: bold; text-decoration: none;">dump it</ins>. The cause of this behaviour is unknown, although it could be a form of open bus behaviour (just returning the last value read on the bus) like on older consoles, although, since the NV3 memory controller would seem to read the address first.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the memory address is meant to be mapped to a subsystem, but the subsystem does not actually exist:''' Your system will '''hard lock''' and will need to be power cycled (not by the power button, even hard reset will not work).</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the memory address is meant to be mapped to a subsystem, but the subsystem does not actually exist:''' Your system will '''hard lock''' and will need to be power cycled (not by the power button, even hard reset will not work).</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_memory_mapping&diff=221&oldid=prev Starfrost at 10:13, 1 June 2025 2025-06-01T10:13:16Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 10:13, 1 June 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l136">Line 136:</td> <td colspan="2" class="diff-lineno">Line 136:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is inside an area that, while not mapped to a register, is mapped to a real GPU subsystem:''' Repeat a register. The length of the repeat is variable and may depend on how many bits inside the GPU logic are used internally to "select" a subsystem's registers. </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is inside an area that, while not mapped to a register, is mapped to a real GPU subsystem:''' Repeat a register. The length of the repeat is variable and may depend on how many bits inside the GPU logic are used internally to "select" a subsystem's registers. </div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is actually mapped, but is inside NV_USER or another write-only region:''' This always returns zero, except for how much space is left in the "virtual FIFO" abstraction for the channel and subchannel being written to. </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory is actually mapped, but is inside NV_USER or another write-only region:''' This always returns zero, except for how much space is left in the "virtual FIFO" abstraction for the channel and subchannel being written to. </div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory does not map to any subsystem:''' You will get a repeating 32-bit pattern of garbage. This always seems to start as <code>0x20 0x07 0x20 0x07</code>, but unpredictably and very rapidly changes to a random set of values. It seems to be different for each subsystem, or may change very quickly, faster than nvplayground can <del style="font-weight: bold; text-decoration: none;">record it</del>. The cause of this behaviour is unknown, although it could be a form of open bus behaviour (just returning the last <del style="font-weight: bold; text-decoration: none;">thing </del>read on the bus) like on older consoles, although, since the NV3 memory controller would seem to read the address first.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>* '''If the unmapped memory does not map to any subsystem:''' You will get a repeating 32-bit pattern of garbage. This always seems to start as <code>0x20 0x07 0x20 0x07</code>, but unpredictably and very rapidly changes to a random set of values. It seems to be different for each subsystem, or may change very quickly, faster than nvplayground can <ins style="font-weight: bold; text-decoration: none;">dyno ut</ins>. The cause of this behaviour is unknown, although it could be a form of open bus behaviour (just returning the last <ins style="font-weight: bold; text-decoration: none;">value </ins>read on the bus) like on older consoles, although, since the NV3 memory controller would seem to read the address first.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the memory address is meant to be mapped to a subsystem, but the subsystem does not actually exist:''' Your system will '''hard lock''' and will need to be power cycled (not by the power button, even hard reset will not work).</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* '''If the memory address is meant to be mapped to a subsystem, but the subsystem does not actually exist:''' Your system will '''hard lock''' and will need to be power cycled (not by the power button, even hard reset will not work).</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_memory_mapping&diff=220&oldid=prev Starfrost at 10:04, 1 June 2025 2025-06-01T10:04:36Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 10:04, 1 June 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l94">Line 94:</td> <td colspan="2" class="diff-lineno">Line 94:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x680000</code> || <code>0x6802FF</code> || <code>[[NV3 PVIDEO|PVIDEO]]</code> (part of <code>PDAC</code>) || Video overlay control; controls current state of RAMDAC and video output; controls how GPU communicates with RAMDAC.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x680000</code> || <code>0x6802FF</code> || <code>[[NV3 PVIDEO|PVIDEO]]</code> (part of <code>PDAC</code>) || Video overlay control; controls current state of RAMDAC and video output; controls how GPU communicates with RAMDAC.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x680300</code> || <code>0x680FFF</code> || <code>[[NV3 <del style="font-weight: bold; text-decoration: none;">NV_USER</del>|<del style="font-weight: bold; text-decoration: none;">NV_USER</del>]] <del style="font-weight: bold; text-decoration: none;">(part of <code>PDAC</del></code><del style="font-weight: bold; text-decoration: none;">) </del>|| RAMDAC: Converts framebuffer to analog signal for display; display parameters (e.g. vblank); clock generation for GPU core and VRAM (<code>MPLL</code>) and pixel clock for driving a CRT (<code>VPLL</code>) 15bpp non-alpha blended hardware cursor (the cursor itself is stored in RAMIN); test registers; palette and colour output control, including 5-6-5 mode for true 16bpp operation instead of 5-5-5 15bpp.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x680300</code> || <code>0x680FFF</code> || <code>[[NV3 <ins style="font-weight: bold; text-decoration: none;">PRAMDAC</ins>|<ins style="font-weight: bold; text-decoration: none;">PRAMDAC</ins>]]</code> || RAMDAC: Converts framebuffer to analog signal for display; display parameters (e.g. vblank); clock generation for GPU core and VRAM (<code>MPLL</code>) and pixel clock for driving a CRT (<code>VPLL</code>) 15bpp non-alpha blended hardware cursor (the cursor itself is stored in RAMIN); test registers; palette and colour output control, including 5-6-5 mode for true 16bpp operation instead of 5-5-5 15bpp.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x681200</code> || <code>0x6813FF</code> || <code>[[NV3 PRAMDAC#User DAC area|USER_DAC]] || DAC registers intended for the user - indexed colour mode palette and pixel mask</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x681200</code> || <code>0x6813FF</code> || <code>[[NV3 PRAMDAC#User DAC area|USER_DAC]] || DAC registers intended for the user - indexed colour mode palette and pixel mask</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x800000</code> || <code>0xFFFFFF</code> || <code>[[NV3 <del style="font-weight: bold; text-decoration: none;">PRAMDAC#User DAC area</del>|<del style="font-weight: bold; text-decoration: none;">USER_DAC</del>]] || PIO-mode object submission area. Each channel is 64 KB in size and is further divided into 8 KB subchannels, which are written to at addresses corresponding to methods of the class of the object that has been set up in them.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| <code>0x800000</code> || <code>0xFFFFFF</code> || <code>[[NV3 <ins style="font-weight: bold; text-decoration: none;">NV_USER</ins>|<ins style="font-weight: bold; text-decoration: none;">NV_USER</ins>]] || PIO-mode object submission area. Each channel is 64 KB in size and is further divided into 8 KB subchannels, which are written to at addresses corresponding to methods of the class of the object that has been set up in them.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_memory_mapping&diff=219&oldid=prev Starfrost at 01:34, 1 June 2025 2025-06-01T01:34:02Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 01:34, 1 June 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l127">Line 127:</td> <td colspan="2" class="diff-lineno">Line 127:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0xC02000</code> || <code>0xC02FFF</code> (maximum extent, depending on size) || <code>[[NV3 RAMRM|RAMRM]]</code> || Real-mode compatibility RAM. The actual RAMIN memory (which this subsystem is a part of) is not addressed linearly, this area is seemingly created by the memory controller to make RAMIN easier to use. </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| <code>0xC02000</code> || <code>0xC02FFF</code> (maximum extent, depending on size) || <code>[[NV3 RAMRM|RAMRM]]</code> || Real-mode compatibility RAM. The actual RAMIN memory (which this subsystem is a part of) is not addressed linearly, this area is seemingly created by the memory controller to make RAMIN easier to use. </div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| <code>0xC03000</code> || <code>0xFFFFFF</code> || <code>[[NV3 RAMIN|RAMIN]]</code> || The rest of instance memory used to store graphics objects. In practice, the grobj structures that correspond to the hashtable entries are usually stored between <code>0x4000</code> and <code>0x5000</code> (or, from the context of BAR1, code>0xC04000</code> and <code>0xC05000</code>). Part of this, in practice, may be more VRAM mirroring, possibly using the RAMIN addressing mode.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| <code>0xC03000</code> || <code>0xFFFFFF</code> || <code>[[NV3 RAMIN|RAMIN]]</code> || The rest of instance memory used to store graphics objects. In practice, the grobj structures that correspond to the hashtable entries are usually stored between <code>0x4000</code> and <code>0x5000</code> (or, from the context of BAR1, <ins style="font-weight: bold; text-decoration: none;"><</ins>code>0xC04000</code> and <code>0xC05000</code>). Part of this, in practice, may be more VRAM mirroring, possibly using the RAMIN addressing mode.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td></tr> </table>

Starfrost