NV3 PMC - Revision history

https://nvwiki.org/index.php?action=history&feed=atom&title=NV3_PMC NV3 PMC - Revision history 2026-05-13T14:29:45Z Revision history for this page on the wiki MediaWiki 1.43.1 https://nvwiki.org/index.php?title=NV3_PMC&diff=617&oldid=prev Starfrost at 13:56, 6 August 2025 2025-08-06T13:56:21Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 13:56, 6 August 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l74">Line 74:</td> <td colspan="2" class="diff-lineno">Line 74:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>Determines which GPU subsystems are enabled and available for use. It is currently unclear what reading and writing to the MMIO register space of a disabled GPU subsystem will actually do. The GPU subsystem certainly ceases to function, since disabling all GPU subsystems while the drivers are running causes an immediate crash and display corruption (a chunk of the leftmost part of the screen is repeated numerous times across the entire screen, almost as if the RAMDAC is "spinning" waiting for new data to come in that never does). </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>Determines which GPU subsystems are enabled and available for use. It is currently unclear what reading and writing to the MMIO register space of a disabled GPU subsystem will actually do. The GPU subsystem certainly ceases to function, since disabling all GPU subsystems while the drivers are running causes an immediate crash and display corruption (a chunk of the leftmost part of the screen is repeated numerous times across the entire screen, almost as if the RAMDAC is "spinning" waiting for new data to come in that never does). </div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Certain subsystems, such as <del style="font-weight: bold; text-decoration: none;">[[PTIMER]], </del>[[NV3 PRAMDAC|PRAMDAC]], and [[NV3 PBUS|PBUS]] (the internal GPU bus), that are critical for system operation, cannot be disabled ([[Configuration#Straps|PEXTDEV]], the VBIOS mirror at <code>0x110000</code>, [[NV3 Real Mode Access|RMA]], and the PCI configuration space mirror at <code>0x1800</code> also cannot be turned off). Strangely, [[NV3 PAUDIO|PAUDIO]], removed after the revision A of the NV3, is still listed in this register. The effect of disabling this nonexistent subsystem is unknown. Additionally, the memory mapping of the GPU cannot be disabled via this mechanism; while it could be turned off by using the PCI configuration registers, the effects of this would be of questionable utility as the chip would basically become a silicon doorstop.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Certain subsystems, such as [[NV3 PRAMDAC|PRAMDAC]], and [[NV3 PBUS|PBUS]] (the internal GPU bus), that are critical for system operation, cannot be disabled ([[Configuration#Straps|PEXTDEV]], the VBIOS mirror at <code>0x110000</code>, [[NV3 Real Mode Access|RMA]], and the PCI configuration space mirror at <code>0x1800</code> also cannot be turned off). Strangely, [[NV3 PAUDIO|PAUDIO]], removed after the revision A of the NV3, is still listed in this register. The effect of disabling this nonexistent subsystem is unknown. Additionally, the memory mapping of the GPU cannot be disabled via this mechanism; while it could be turned off by using the PCI configuration registers, the effects of this would be of questionable utility as the chip would basically become a silicon doorstop.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>In all cases, a 1 for a particular bit enables the subsystem, while a zero disables it. This register, like many in the NV3 architecture, is structured so that, when the registers' value is interpreted as a hexadecimal number, each individual number represents one part of the register, and the number can be treated as a binary number (only <code>1</code> and <code>0</code> are relevant). This basically means that only eight settings are toggleable (as all Nvidia registers are 32-bit in size, regardless of how much of those are significant), and the settings toggled by the register are one nybble (four bits) apart.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>In all cases, a 1 for a particular bit enables the subsystem, while a zero disables it. This register, like many in the NV3 architecture, is structured so that, when the registers' value is interpreted as a hexadecimal number, each individual number represents one part of the register, and the number can be treated as a binary number (only <code>1</code> and <code>0</code> are relevant). This basically means that only eight settings are toggleable (as all Nvidia registers are 32-bit in size, regardless of how much of those are significant), and the settings toggled by the register are one nybble (four bits) apart.</div></td></tr> <tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l91">Line 91:</td> <td colspan="2" class="diff-lineno">Line 91:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| 12 || Enables or disables [[NV3 PGRAPH|PGRAPH]], the graphics engine. Critical for graphics operation.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| 12 || Enables or disables [[NV3 PGRAPH|PGRAPH]], the graphics engine. Critical for graphics operation.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| 16 || Enables or disables PPMI <del style="font-weight: bold; text-decoration: none;">(Performance Measurement </del>and <del style="font-weight: bold; text-decoration: none;">Instrumentation? Performance Monitoring and Instrumentation?), an internal subsystem with no exposed </del>registers <del style="font-weight: bold; text-decoration: none;">that allowed Nvidia engineers </del>to <del style="font-weight: bold; text-decoration: none;">debug the GPU via the "NvWatch" software in debug compiled drivers</del>.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| 16 || Enables or disables PPMI<ins style="font-weight: bold; text-decoration: none;">, which is both PTIMER </ins>and <ins style="font-weight: bold; text-decoration: none;">the bus mastering system. It is critical for operation but does not expose any </ins>registers<ins style="font-weight: bold; text-decoration: none;">; turning it off will immediately crash the system since bus requests will not be able </ins>to <ins style="font-weight: bold; text-decoration: none;">be serviced properly</ins>.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| 20 || Enables or disables [[NV3 PFB|PFB]], the interface to the framebuffer and VRAM. Critical for graphics operation. </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| 20 || Enables or disables [[NV3 PFB|PFB]], the interface to the framebuffer and VRAM. Critical for graphics operation. </div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_PMC&diff=614&oldid=prev Starfrost at 17:53, 3 August 2025 2025-08-03T17:53:21Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 17:53, 3 August 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l118">Line 118:</td> <td colspan="2" class="diff-lineno">Line 118:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| 2 (<code>SOFTWARE</code>) || Software interrupts are enabled (when software writes directly to the [[NV3 PMC#PMC_INTR_0]] register)</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| 2 (<code>SOFTWARE</code>) || Software interrupts are enabled (when software writes directly to the [[NV3 PMC#PMC_INTR_0]] register)</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|- </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|- </div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| 3 (1 <del style="font-weight: bold; text-decoration: none;">OR </del>2) || Both hardware and software interrupts are enabled.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| 3 (1 <ins style="font-weight: bold; text-decoration: none;">AND </ins>2) || Both hardware and software interrupts are enabled.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_PMC&diff=202&oldid=prev Starfrost at 11:58, 17 May 2025 2025-05-17T11:58:39Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 11:58, 17 May 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l79">Line 79:</td> <td colspan="2" class="diff-lineno">Line 79:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>{| class="wikitable"</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>{| class="wikitable"</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>|+ Bits of the <code><del style="font-weight: bold; text-decoration: none;">NV_PMC_ENABLE</del></code> register</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>|+ Bits of the <code><ins style="font-weight: bold; text-decoration: none;">PMC_ENABLE</ins></code> register</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! Bit range (high:low) !! Purpose </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! Bit range (high:low) !! Purpose </div></td></tr> <tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l116">Line 116:</td> <td colspan="2" class="diff-lineno">Line 116:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| 1 (<code>HARDWARE</code>) || Hardware interrupts are enabled - hardware interrupts are generated by the GPU during normal operation, such as PGRAPH's VBLANK interrupt generated at every vertical blank)</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| 1 (<code>HARDWARE</code>) || Hardware interrupts are enabled - hardware interrupts are generated by the GPU during normal operation, such as PGRAPH's VBLANK interrupt generated at every vertical blank)</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| 2 (<code>SOFTWARE</code>) || Software interrupts are enabled (when software writes directly to the [[NV3 PMC#<del style="font-weight: bold; text-decoration: none;">NV_PMC_INTR_0</del>]] register)</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| 2 (<code>SOFTWARE</code>) || Software interrupts are enabled (when software writes directly to the [[NV3 PMC#<ins style="font-weight: bold; text-decoration: none;">PMC_INTR_0</ins>]] register)</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|- </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|- </div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| 3 (1 OR 2) || Both hardware and software interrupts are enabled.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| 3 (1 OR 2) || Both hardware and software interrupts are enabled.</div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_PMC&diff=201&oldid=prev Starfrost at 11:58, 17 May 2025 2025-05-17T11:58:26Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 11:58, 17 May 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l47">Line 47:</td> <td colspan="2" class="diff-lineno">Line 47:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>It is not clear what company the name "Helios" refers to. There is a company called Helios Semiconductor, founded in Taiwan on 12 March 1997. However, it is an IC design company focusing on low-end DSPs, LCD controllers, codec decoders, speech synthesis devices (and various other speech-related devices) and MIDI controllers; in the past (~2001) they also made SoCs for PDAs (the heritage of which is still in their modern chips, as they use proprietary 8/16-bit RISC CPU architectures originally designed for this purpose in many of their products), which were strangely branded as "cyber neural processors". It seems extremely unlikely that this company ever owned or operated a silicon fab, and it was founded just weeks before the NV3 taped out and manufacturing it would have been logistically impossible (let alone any earlier Nvidia chips). Additionally, Helios' initial capitalisation of $2.5 million<ref>https://web.archive.org/web/20010217143203/http://www.helios.com.tw/ (Helios Semiconductor web archive; 17 February 2001)</ref> is an implausibly low amount for a fab company, even in 1997. It is possibly an earlier name for a known chip company. There is another company that fabricated batteries called Helios, but it was founded long after the RIVA 128 was discontinued; it's possible Nvidia intended to use Helios's parts but this is still extremely unlikely, since the company was barely founded, obscure, and had very few employees, and even then wouldn't be justified as a "foundry". The NV2 is set to have a <code><del style="font-weight: bold; text-decoration: none;">NV_PMC_BOOT_0</del></code> value of <code>0x10020400</code>, implying that it would have been manufactured by this mysterious company.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>It is not clear what company the name "Helios" refers to. There is a company called Helios Semiconductor, founded in Taiwan on 12 March 1997. However, it is an IC design company focusing on low-end DSPs, LCD controllers, codec decoders, speech synthesis devices (and various other speech-related devices) and MIDI controllers; in the past (~2001) they also made SoCs for PDAs (the heritage of which is still in their modern chips, as they use proprietary 8/16-bit RISC CPU architectures originally designed for this purpose in many of their products), which were strangely branded as "cyber neural processors". It seems extremely unlikely that this company ever owned or operated a silicon fab, and it was founded just weeks before the NV3 taped out and manufacturing it would have been logistically impossible (let alone any earlier Nvidia chips). Additionally, Helios' initial capitalisation of $2.5 million<ref>https://web.archive.org/web/20010217143203/http://www.helios.com.tw/ (Helios Semiconductor web archive; 17 February 2001)</ref> is an implausibly low amount for a fab company, even in 1997. It is possibly an earlier name for a known chip company. There is another company that fabricated batteries called Helios, but it was founded long after the RIVA 128 was discontinued; it's possible Nvidia intended to use Helios's parts but this is still extremely unlikely, since the company was barely founded, obscure, and had very few employees, and even then wouldn't be justified as a "foundry". The NV2 is set to have a <code><ins style="font-weight: bold; text-decoration: none;">PMC_BOOT_0</ins></code> value of <code>0x10020400</code>, implying that it would have been manufactured by this mysterious company.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>What Nvidia appear to have been the intended values for various NV3-based chips is listed below. The value hardcoded in the Nvidia drivers for NV3T-based cards is hardcoded to one that implies a TSMC-manufactured card, although presumably, STMicro-manufactured NV3T chips (which are confirmed to exist) have bits 31 through 27 as zero rather than two (so e.g. <code>0x20030120</code>, used as the value for stepping A01 NV3Tc hips, would become <code>0x00030120</code>). Only the revision bits are checked (it has to be <code>0x20</code> or higher) when determining if "RIVA 128" or "RIVA 128 ZX" should be printed on the sign-on screen in NV3T-compatible versions of the NV3 video BIOS code.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>What Nvidia appear to have been the intended values for various NV3-based chips is listed below. The value hardcoded in the Nvidia drivers for NV3T-based cards is hardcoded to one that implies a TSMC-manufactured card, although presumably, STMicro-manufactured NV3T chips (which are confirmed to exist) have bits 31 through 27 as zero rather than two (so e.g. <code>0x20030120</code>, used as the value for stepping A01 NV3Tc hips, would become <code>0x00030120</code>). Only the revision bits are checked (it has to be <code>0x20</code> or higher) when determining if "RIVA 128" or "RIVA 128 ZX" should be printed on the sign-on screen in NV3T-compatible versions of the NV3 video BIOS code.</div></td></tr> <tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l54">Line 54:</td> <td colspan="2" class="diff-lineno">Line 54:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|+ <code>PMC_BOOT_0</code> value table</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|+ <code>PMC_BOOT_0</code> value table</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>! GPU revision !! <code><del style="font-weight: bold; text-decoration: none;">NV_PMC_BOOT_0</del></code> value </div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>! GPU revision !! <code><ins style="font-weight: bold; text-decoration: none;">PMC_BOOT_0</ins></code> value </div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| NV3 revision A || <code>0x00030100</code></div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>| NV3 revision A || <code>0x00030100</code></div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_PMC&diff=200&oldid=prev Starfrost at 11:58, 17 May 2025 2025-05-17T11:58:08Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 11:58, 17 May 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l10">Line 10:</td> <td colspan="2" class="diff-lineno">Line 10:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* Read/write</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* Read/write</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Holds part of the manufacture-time configuration information (the rest is held in the [[Configuration#Straps|Straps]] for OEM-level configuration, and [[NV3 PFB|PFB_BOOT_0]] for more manufacture-time configuration). Presumably this was <del style="font-weight: bold; text-decoration: none;">set up </del>by Nvidia and/or SGS-Thomson in the factory, possibly via focused ion beam (FIB) chip modification techniques.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Holds part of the manufacture-time configuration information (the rest is held in the [[Configuration#Straps|Straps]] for OEM-level configuration, and [[NV3 PFB|PFB_BOOT_0]] for more manufacture-time configuration). Presumably this <ins style="font-weight: bold; text-decoration: none;">information </ins>was <ins style="font-weight: bold; text-decoration: none;">encoded into the die </ins>by Nvidia and/or SGS-Thomson in the factory, possibly via focused ion beam (FIB) chip modification techniques.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>{| class="wikitable"</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>{| class="wikitable"</div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_PMC&diff=199&oldid=prev Starfrost at 11:56, 17 May 2025 2025-05-17T11:56:26Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 11:56, 17 May 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l49">Line 49:</td> <td colspan="2" class="diff-lineno">Line 49:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>It is not clear what company the name "Helios" refers to. There is a company called Helios Semiconductor, founded in Taiwan on 12 March 1997. However, it is an IC design company focusing on low-end DSPs, LCD controllers, codec decoders, speech synthesis devices (and various other speech-related devices) and MIDI controllers; in the past (~2001) they also made SoCs for PDAs (the heritage of which is still in their modern chips, as they use proprietary 8/16-bit RISC CPU architectures originally designed for this purpose in many of their products), which were strangely branded as "cyber neural processors". It seems extremely unlikely that this company ever owned or operated a silicon fab, and it was founded just weeks before the NV3 taped out and manufacturing it would have been logistically impossible (let alone any earlier Nvidia chips). Additionally, Helios' initial capitalisation of $2.5 million<ref>https://web.archive.org/web/20010217143203/http://www.helios.com.tw/ (Helios Semiconductor web archive; 17 February 2001)</ref> is an implausibly low amount for a fab company, even in 1997. It is possibly an earlier name for a known chip company. There is another company that fabricated batteries called Helios, but it was founded long after the RIVA 128 was discontinued; it's possible Nvidia intended to use Helios's parts but this is still extremely unlikely, since the company was barely founded, obscure, and had very few employees, and even then wouldn't be justified as a "foundry". The NV2 is set to have a <code>NV_PMC_BOOT_0</code> value of <code>0x10020400</code>, implying that it would have been manufactured by this mysterious company.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>It is not clear what company the name "Helios" refers to. There is a company called Helios Semiconductor, founded in Taiwan on 12 March 1997. However, it is an IC design company focusing on low-end DSPs, LCD controllers, codec decoders, speech synthesis devices (and various other speech-related devices) and MIDI controllers; in the past (~2001) they also made SoCs for PDAs (the heritage of which is still in their modern chips, as they use proprietary 8/16-bit RISC CPU architectures originally designed for this purpose in many of their products), which were strangely branded as "cyber neural processors". It seems extremely unlikely that this company ever owned or operated a silicon fab, and it was founded just weeks before the NV3 taped out and manufacturing it would have been logistically impossible (let alone any earlier Nvidia chips). Additionally, Helios' initial capitalisation of $2.5 million<ref>https://web.archive.org/web/20010217143203/http://www.helios.com.tw/ (Helios Semiconductor web archive; 17 February 2001)</ref> is an implausibly low amount for a fab company, even in 1997. It is possibly an earlier name for a known chip company. There is another company that fabricated batteries called Helios, but it was founded long after the RIVA 128 was discontinued; it's possible Nvidia intended to use Helios's parts but this is still extremely unlikely, since the company was barely founded, obscure, and had very few employees, and even then wouldn't be justified as a "foundry". The NV2 is set to have a <code>NV_PMC_BOOT_0</code> value of <code>0x10020400</code>, implying that it would have been manufactured by this mysterious company.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>What Nvidia appear to have been the intended values for various NV3-based chips is listed below. The value hardcoded in the Nvidia drivers for NV3T-based cards is hardcoded to one that implies a TSMC-manufactured card, although presumably, STMicro-manufactured NV3T chips (which are confirmed to exist) have bits 31 through 27 as zero rather than two (so e.g. <code>0x20030120</code>, used as the value for stepping A01 NV3Tc hips, would become <code>0x00030120</code>). Only the revision bits are checked (it has to be <code>0x20</code> or higher) when determining if "<del style="font-weight: bold; text-decoration: none;">Riva </del>128" or "<del style="font-weight: bold; text-decoration: none;">Riva </del>128 ZX" should be printed in NV3T-compatible versions of the NV3 video BIOS code.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>What Nvidia appear to have been the intended values for various NV3-based chips is listed below. The value hardcoded in the Nvidia drivers for NV3T-based cards is hardcoded to one that implies a TSMC-manufactured card, although presumably, STMicro-manufactured NV3T chips (which are confirmed to exist) have bits 31 through 27 as zero rather than two (so e.g. <code>0x20030120</code>, used as the value for stepping A01 NV3Tc hips, would become <code>0x00030120</code>). Only the revision bits are checked (it has to be <code>0x20</code> or higher) when determining if "<ins style="font-weight: bold; text-decoration: none;">RIVA </ins>128" or "<ins style="font-weight: bold; text-decoration: none;">RIVA </ins>128 ZX" should be printed <ins style="font-weight: bold; text-decoration: none;">on the sign-on screen </ins>in NV3T-compatible versions of the NV3 video BIOS code.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>{| class="wikitable"</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>{| class="wikitable"</div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_PMC&diff=198&oldid=prev Starfrost at 11:54, 17 May 2025 2025-05-17T11:54:31Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 11:54, 17 May 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l41">Line 41:</td> <td colspan="2" class="diff-lineno">Line 41:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* 0 = Nvidia</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* 0 = Nvidia</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| 31:28 || <code>FOUNDRY</code> || The <del style="font-weight: bold; text-decoration: none;">foundary </del>partner that manufactured the GPU. || </div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| 31:28 || <code>FOUNDRY</code> || The <ins style="font-weight: bold; text-decoration: none;">foundry </ins>partner that manufactured the GPU. || </div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* 0 = SGS-Thomson/STMicroelectronics</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* 0 = SGS-Thomson/STMicroelectronics</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* 1 = Helios </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* 1 = Helios </div></td></tr> <tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l47">Line 47:</td> <td colspan="2" class="diff-lineno">Line 47:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>It is not clear what company the name "Helios" refers to. There is a company called Helios Semiconductor, founded in Taiwan on 12 March 1997. However, it is an IC design company focusing on low-end DSPs, LCD controllers, codec decoders, speech synthesis devices (and various other speech-related devices) and MIDI controllers; in the past (~2001) they also made SoCs for PDAs (the heritage of which is still in their modern chips, as they use proprietary 8/16-bit RISC CPU architectures originally designed for this purpose in many of their products), which were strangely branded as "cyber neural processors". It seems extremely unlikely that this company ever owned or operated a silicon fab, and it was founded just weeks before the NV3 taped out and manufacturing it would have been logistically impossible (let alone any earlier Nvidia chips). Additionally, Helios' initial capitalisation of $2.5 million<ref>https://web.archive.org/web/20010217143203/http://www.helios.com.tw/ (Helios Semiconductor web archive; 17 February 2001)</ref> is an implausibly low amount for a fab company, even in 1997. It is possibly an earlier name for a known chip company. There is another company that fabricated batteries called Helios, but it was founded long after the RIVA 128 was discontinued; it's possible Nvidia intended to use Helios's parts but this is still extremely unlikely, since the company was barely founded, obscure, and had very few employees, and even then wouldn't be justified as a "foundry"<del style="font-weight: bold; text-decoration: none;">.}</del>. The NV2 is set to have a <code>NV_PMC_BOOT_0</code> value of <code>0x10020400</code>, implying that it would have been manufactured by this mysterious company.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>It is not clear what company the name "Helios" refers to. There is a company called Helios Semiconductor, founded in Taiwan on 12 March 1997. However, it is an IC design company focusing on low-end DSPs, LCD controllers, codec decoders, speech synthesis devices (and various other speech-related devices) and MIDI controllers; in the past (~2001) they also made SoCs for PDAs (the heritage of which is still in their modern chips, as they use proprietary 8/16-bit RISC CPU architectures originally designed for this purpose in many of their products), which were strangely branded as "cyber neural processors". It seems extremely unlikely that this company ever owned or operated a silicon fab, and it was founded just weeks before the NV3 taped out and manufacturing it would have been logistically impossible (let alone any earlier Nvidia chips). Additionally, Helios' initial capitalisation of $2.5 million<ref>https://web.archive.org/web/20010217143203/http://www.helios.com.tw/ (Helios Semiconductor web archive; 17 February 2001)</ref> is an implausibly low amount for a fab company, even in 1997. It is possibly an earlier name for a known chip company. There is another company that fabricated batteries called Helios, but it was founded long after the RIVA 128 was discontinued; it's possible Nvidia intended to use Helios's parts but this is still extremely unlikely, since the company was barely founded, obscure, and had very few employees, and even then wouldn't be justified as a "foundry". The NV2 is set to have a <code>NV_PMC_BOOT_0</code> value of <code>0x10020400</code>, implying that it would have been manufactured by this mysterious company.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>What Nvidia appear to have been the intended values for various NV3-based chips is listed below. The value hardcoded in the Nvidia drivers for NV3T-based cards is hardcoded to one that implies a TSMC-manufactured card, although presumably, STMicro-manufactured NV3T chips (confirmed to exist) have bits 31 through 27 as zero rather than two (so e.g. <code>0x20030120</code> for stepping A01 <del style="font-weight: bold; text-decoration: none;">NV3Ts </del>would become <code>0x00030120</code>). Only the revision bits are checked (it has to be <code>0x20</code>) when determining if "Riva 128" or "Riva 128 ZX" should be printed in NV3T-compatible versions of the NV3 video BIOS code.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>What Nvidia appear to have been the intended values for various NV3-based chips is listed below. The value hardcoded in the Nvidia drivers for NV3T-based cards is hardcoded to one that implies a TSMC-manufactured card, although presumably, STMicro-manufactured NV3T chips (<ins style="font-weight: bold; text-decoration: none;">which are </ins>confirmed to exist) have bits 31 through 27 as zero rather than two (so e.g. <code>0x20030120</code><ins style="font-weight: bold; text-decoration: none;">, used as the value </ins>for stepping A01 <ins style="font-weight: bold; text-decoration: none;">NV3Tc hips, </ins>would become <code>0x00030120</code>). Only the revision bits are checked (it has to be <code>0x20</code> <ins style="font-weight: bold; text-decoration: none;">or higher</ins>) when determining if "Riva 128" or "Riva 128 ZX" should be printed in NV3T-compatible versions of the NV3 video BIOS code.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>{| class="wikitable"</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>{| class="wikitable"</div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_PMC&diff=195&oldid=prev Starfrost at 00:09, 17 May 2025 2025-05-17T00:09:27Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 00:09, 17 May 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l47">Line 47:</td> <td colspan="2" class="diff-lineno">Line 47:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>It is not clear what company the name "Helios" refers to. There is a company called Helios Semiconductor, founded in Taiwan on 12 March 1997. However, it is an IC design company focusing on low-end DSPs, LCD controllers, codec decoders, speech synthesis devices (and various other speech-related devices) and MIDI controllers; in the past (~2001) they also made SoCs for PDAs (the heritage of which is still in their modern chips, as they use 8/16-bit RISC CPU architectures for many of their <del style="font-weight: bold; text-decoration: none;">product</del>), which were strangely branded as "cyber neural processors". It seems extremely unlikely that this company ever owned or operated a silicon fab, and it was founded just weeks before the NV3 taped out and manufacturing it would have been logistically impossible (let alone any earlier Nvidia chips). Additionally, Helios' initial capitalisation of $2.5 million<ref>https://web.archive.org/web/20010217143203/http://www.helios.com.tw/ (Helios Semiconductor web archive; 17 February 2001)</ref> is an implausibly low amount for a fab company, even in 1997. It is possibly an earlier name for a known chip company. There is another company that fabricated batteries called Helios, but it was founded long after the RIVA 128 was discontinued; it's possible Nvidia intended to use Helios's parts but this is still extremely unlikely, since the company was barely founded, obscure, and had very few employees, and even then wouldn't be justified as a "foundry".}. The NV2 is set to have a <code>NV_PMC_BOOT_0</code> value of <code>0x10020400</code>, implying that it would have been manufactured by this mysterious company.</div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>It is not clear what company the name "Helios" refers to. There is a company called Helios Semiconductor, founded in Taiwan on 12 March 1997. However, it is an IC design company focusing on low-end DSPs, LCD controllers, codec decoders, speech synthesis devices (and various other speech-related devices) and MIDI controllers; in the past (~2001) they also made SoCs for PDAs (the heritage of which is still in their modern chips, as they use <ins style="font-weight: bold; text-decoration: none;">proprietary </ins>8/16-bit RISC CPU architectures <ins style="font-weight: bold; text-decoration: none;">originally designed </ins>for <ins style="font-weight: bold; text-decoration: none;">this purpose in </ins>many of their <ins style="font-weight: bold; text-decoration: none;">products</ins>), which were strangely branded as "cyber neural processors". It seems extremely unlikely that this company ever owned or operated a silicon fab, and it was founded just weeks before the NV3 taped out and manufacturing it would have been logistically impossible (let alone any earlier Nvidia chips). Additionally, Helios' initial capitalisation of $2.5 million<ref>https://web.archive.org/web/20010217143203/http://www.helios.com.tw/ (Helios Semiconductor web archive; 17 February 2001)</ref> is an implausibly low amount for a fab company, even in 1997. It is possibly an earlier name for a known chip company. There is another company that fabricated batteries called Helios, but it was founded long after the RIVA 128 was discontinued; it's possible Nvidia intended to use Helios's parts but this is still extremely unlikely, since the company was barely founded, obscure, and had very few employees, and even then wouldn't be justified as a "foundry".}. The NV2 is set to have a <code>NV_PMC_BOOT_0</code> value of <code>0x10020400</code>, implying that it would have been manufactured by this mysterious company.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>What Nvidia appear to have been the intended values for various NV3-based chips is listed below. The value hardcoded in the Nvidia drivers for NV3T-based cards is hardcoded to one that implies a TSMC-manufactured card, although presumably, STMicro-manufactured NV3T chips (confirmed to exist) have bits 31 through 27 as zero rather than two (so e.g. <code>0x20030120</code> for stepping A01 NV3Ts would become <code>0x00030120</code>). Only the revision bits are checked (it has to be <code>0x20</code>) when determining if "Riva 128" or "Riva 128 ZX" should be printed in NV3T-compatible versions of the NV3 video BIOS code.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>What Nvidia appear to have been the intended values for various NV3-based chips is listed below. The value hardcoded in the Nvidia drivers for NV3T-based cards is hardcoded to one that implies a TSMC-manufactured card, although presumably, STMicro-manufactured NV3T chips (confirmed to exist) have bits 31 through 27 as zero rather than two (so e.g. <code>0x20030120</code> for stepping A01 NV3Ts would become <code>0x00030120</code>). Only the revision bits are checked (it has to be <code>0x20</code>) when determining if "Riva 128" or "Riva 128 ZX" should be printed in NV3T-compatible versions of the NV3 video BIOS code.</div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_PMC&diff=194&oldid=prev Starfrost at 00:08, 17 May 2025 2025-05-17T00:08:48Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 00:08, 17 May 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l38">Line 38:</td> <td colspan="2" class="diff-lineno">Line 38:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>In practice only the value 3 will ever be used on NV3.</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>In practice only the value 3 will ever be used on NV3.</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| 27:24 || <code>MANUFACTURER</code> || Another NV1 remnant from when the NV1 could either be branded as the SGS-Thomson STG-2000 (1, <code>MANUFACTURER_SGS</code>) or the Nvidia NV1 (0, <code>MANUFACTURER_NV</code>. || </div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| 27:24 || <code>MANUFACTURER</code> || Another NV1 remnant<ins style="font-weight: bold; text-decoration: none;">, </ins>from when the NV1 could either be branded as the SGS-Thomson STG-2000 (1, <code>MANUFACTURER_SGS</code>) or the Nvidia NV1 (0, <code>MANUFACTURER_NV</code>. || </div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* 0 = Nvidia</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* 0 = Nvidia</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| 31:28 || <code>FOUNDRY</code> || The <del style="font-weight: bold; text-decoration: none;">manufacturer of </del>the GPU. || </div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| 31:28 || <code>FOUNDRY</code> || The <ins style="font-weight: bold; text-decoration: none;">foundary partner that manufactured </ins>the GPU. || </div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* 0 = SGS-Thomson/STMicroelectronics</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* 0 = SGS-Thomson/STMicroelectronics</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* 1 = Helios </div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* 1 = Helios </div></td></tr> </table>

Starfrost https://nvwiki.org/index.php?title=NV3_PMC&diff=193&oldid=prev Starfrost at 00:07, 17 May 2025 2025-05-17T00:07:36Z

<p></p> <table style="background-color: #fff; color: #202122;" data-mw="interface"> <col class="diff-marker" /> <col class="diff-content" /> <col class="diff-marker" /> <col class="diff-content" /> <tr class="diff-title" lang="en-GB"> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Older revision</td> <td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Revision as of 00:07, 17 May 2025</td> </tr><tr><td colspan="2" class="diff-lineno" id="mw-diff-left-l13">Line 13:</td> <td colspan="2" class="diff-lineno">Line 13:</td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>{| class="wikitable"</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>{| class="wikitable"</div></td></tr> <tr><td class="diff-marker" data-marker="−"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>|+ <code>PMC_BOOT_0</code> register <del style="font-weight: bold; text-decoration: none;">sections</del></div></td><td class="diff-marker" data-marker="+"></td><td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>|+ <code>PMC_BOOT_0</code> register <ins style="font-weight: bold; text-decoration: none;">bits</ins></div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td></tr> <tr><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! Bit range (high:low) !! Name !! Purpose !! Values</div></td><td class="diff-marker"></td><td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! Bit range (high:low) !! Name !! Purpose !! Values</div></td></tr> </table>

Starfrost