NV3 - Revision history

Huanker: Make NV3 bold + fix spelling error

2025-12-26T23:54:41Z

Make NV3 bold + fix spelling error

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	The NV3 architecture is Nvidia's third-generation graphics architecture, designed from 1996 to 1997 and released at the end of August 1997<ref>https://groups.google.com/g/comp.sys.ibm.pc.hardware.video/c/M_kHjM9bv8o/m/wUJnpYyJtF4J</ref> under the ''Riva 128'' branding. It was designed by a team under the direction of [[David Kirk]] and was designed to be the "fastest triangle renderer on earth" at the time while being able to be ~~desizned~~ in a very short time (due to Nvidia's near-bankruptcy during the period of its design), provide 2D acceleration with full, non-emulated (unlike the [[NV1]]) VGA compatibility, and at a reasonably low price. It did achieve this goal, although with many caveats: the graphics image quality was not as good as some rival cards, such as the 3dfx Voodoo, there are a few minor missing features within the architecture that were considered important at the time like trilinear texture filtering. Most importantly, the NV3 architecture was by far the fastest 2D/3D combo card, and by some measures the fastest 3D card full stop, available at the time, as 3dfx Voodoo-based cards before the Voodoo Banshee, excluding the disastrous Voodoo Rush, can only accelerate 3D applications (barring specialised "3D-on-2D" drivers), and even then only in fullscreen mode. Even when it was not used as a 3D card, it was often used as a passthrough for a 3dfx Voodoo card (despite the Riva 128 having almost equal 3D capabilities). While the Riva 128 had worse CPU scaling, performing slower on slower CPUs, despite its more complete triangle setup engine, its overall speed was slightly faster, especially on smaller triangles, albeit with somewhat worse image quality (in 1997, having a usable image at all was considered decent due to catastrophe cards like the Alliance Semiconductor aT3D, but by 1999 it was considered almost bad image quality); it could also load much larger textures (2048x2048, although impractical due to the limited VRAM, as opposed to the Voodoo's 256x256). Most NV3-architecture based graphics cards ran at a default clock speed of 100 Mhz (although some TSMC-manufactured NV3T chips are specified to run at 90 Mhz, and overclocking up to around 120 Mhz was often done safely with the requisite improvements in performance), with the pixel clock ranging up to a maximum of 230 (NV3) or 260 (NV3T) Mhz. A maximum of 4 megabytes of Video RAM is supported and the card can be run off of either the PCI 2.1 (at 66 Megahertz bus speed) or AGP 1X buses.		The '''NV3''' architecture is Nvidia's third-generation graphics architecture, designed from 1996 to 1997 and released at the end of August 1997<ref>https://groups.google.com/g/comp.sys.ibm.pc.hardware.video/c/M_kHjM9bv8o/m/wUJnpYyJtF4J</ref> under the ''Riva 128'' branding. It was designed by a team under the direction of [[David Kirk]] and was designed to be the "fastest triangle renderer on earth" at the time while being able to be designed in a very short time (due to Nvidia's near-bankruptcy during the period of its design), provide 2D acceleration with full, non-emulated (unlike the [[NV1]]) VGA compatibility, and at a reasonably low price. It did achieve this goal, although with many caveats: the graphics image quality was not as good as some rival cards, such as the 3dfx Voodoo, there are a few minor missing features within the architecture that were considered important at the time like trilinear texture filtering. Most importantly, the NV3 architecture was by far the fastest 2D/3D combo card, and by some measures the fastest 3D card full stop, available at the time, as 3dfx Voodoo-based cards before the Voodoo Banshee, excluding the disastrous Voodoo Rush, can only accelerate 3D applications (barring specialised "3D-on-2D" drivers), and even then only in fullscreen mode. Even when it was not used as a 3D card, it was often used as a passthrough for a 3dfx Voodoo card (despite the Riva 128 having almost equal 3D capabilities). While the Riva 128 had worse CPU scaling, performing slower on slower CPUs, despite its more complete triangle setup engine, its overall speed was slightly faster, especially on smaller triangles, albeit with somewhat worse image quality (in 1997, having a usable image at all was considered decent due to catastrophe cards like the Alliance Semiconductor aT3D, but by 1999 it was considered almost bad image quality); it could also load much larger textures (2048x2048, although impractical due to the limited VRAM, as opposed to the Voodoo's 256x256). Most NV3-architecture based graphics cards ran at a default clock speed of 100 Mhz (although some TSMC-manufactured NV3T chips are specified to run at 90 Mhz, and overclocking up to around 120 Mhz was often done safely with the requisite improvements in performance), with the pixel clock ranging up to a maximum of 230 (NV3) or 260 (NV3T) Mhz. A maximum of 4 megabytes of Video RAM is supported and the card can be run off of either the PCI 2.1 (at 66 Megahertz bus speed) or AGP 1X buses.

	The 2D acceleration of the NV3 architecture provides full VGA, VBE 3.0, and accelerated 2D support, Windows GDI acceleration (including full GDI ternary bitblit ROP support), point, line and rectangle drawing, image rendering, screen to screen blit with up to four manipulatable buffers (although only two are used for this purpose in practice in the Nvidia drivers), image scaling and stretching, rendering at an 8 to 32 bits per pixel colour depth at a maximum theoretical resolution of 20481536 and maximum practical resolution of either 16001200 (NV3) or 1920*1200 (NV3T), although this requires reducing the colour depth to 16bpp or lower. Other supported features of the 2D graphics pipeline include colour conversion (including RGB10, YUV420 and 422, and palette-based colour formats), colour-expansion and downconversion, color-expanded bitblit for optimised text bitmap rendering, color key, plane mask and TV-out functionality with video overlay support (via the on-board "Mediaport"). Buffers can be anywhere in VRAM with any pitch and any supported colour format. The card's VGA support is provided via a modified Weitek VGA core that Nvidia licensed.		The 2D acceleration of the NV3 architecture provides full VGA, VBE 3.0, and accelerated 2D support, Windows GDI acceleration (including full GDI ternary bitblit ROP support), point, line and rectangle drawing, image rendering, screen to screen blit with up to four manipulatable buffers (although only two are used for this purpose in practice in the Nvidia drivers), image scaling and stretching, rendering at an 8 to 32 bits per pixel colour depth at a maximum theoretical resolution of 20481536 and maximum practical resolution of either 16001200 (NV3) or 1920*1200 (NV3T), although this requires reducing the colour depth to 16bpp or lower. Other supported features of the 2D graphics pipeline include colour conversion (including RGB10, YUV420 and 422, and palette-based colour formats), colour-expansion and downconversion, color-expanded bitblit for optimised text bitmap rendering, color key, plane mask and TV-out functionality with video overlay support (via the on-board "Mediaport"). Buffers can be anywhere in VRAM with any pitch and any supported colour format. The card's VGA support is provided via a modified Weitek VGA core that Nvidia licensed.

Starfrost at 21:36, 26 December 2025

2025-12-26T21:36:08Z

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	The NV3T (NV3 Turbo; also known as NV3 revision C), commercialised as the ''RIVA 128 ZX'' (briefly called "RIVA 128 Turbo"), is a respin of the NV3 to allow for higher RAMDAC clock speeds (260Mhz) and more Video RAM to compete with the Intel i740. It expands the maximum amount of video RAM to 8MB, makes PFIFO's CACHE1 64 units deep instead of 32, allows for resolutions above 1600x1200 by both the aforementioned higher clocked RAMDAC in both the VGA BIOS and the drivers, and can run 3D at higher resolutions due to its higher amount of video RAM. Additionally, this was the first Nvidia GPU (other than the very few [[NV2]]'s ~~manfuactured~~) to be manufactured by a manufacturer that is not STMicroelectronics (then SGS-Thomson): the RIVA 128 ZX was manufactured by TSMC; it appears that they may not have had equal yields to ST (despite ST's yield crisis at the time), as some NV3Ts manufactured by TSMC are downclocked to 90 megahertz.		The NV3T (NV3 Turbo; also known as NV3 revision C), commercialised as the ''RIVA 128 ZX'' (briefly called "RIVA 128 Turbo"), is a respin of the NV3 to allow for higher RAMDAC clock speeds (260Mhz) and more Video RAM to compete with the Intel i740. It expands the maximum amount of video RAM to 8MB, makes PFIFO's CACHE1 64 units deep instead of 32, allows for resolutions above 1600x1200 by both the aforementioned higher clocked RAMDAC in both the VGA BIOS and the drivers, and can run 3D at higher resolutions due to its higher amount of video RAM. Additionally, this was the first Nvidia GPU (other than the very few [[NV2]]'s manufactured) to be manufactured by a manufacturer that is not STMicroelectronics (then SGS-Thomson): the RIVA 128 ZX was manufactured by TSMC; it appears that they may not have had equal yields to ST (despite ST's yield crisis at the time), as some NV3Ts manufactured by TSMC are downclocked to 90 megahertz.

	==Tutorials==		==Tutorials==

Starfrost at 21:07, 26 December 2025

2025-12-26T21:07:43Z

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	==See also==		==See also==
	* [[STG-3001]]		* [[STG-3001]]
			* [[NV3 (QTM)]]

	==Notes==		==Notes==

Huanker: Add "See also" section with link to STMicroelectronics STG-3001

2025-12-26T20:55:09Z

Add "See also" section with link to STMicroelectronics STG-3001

← Older revision		Revision as of 20:55, 26 December 2025
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	* [[NV3 configuration#Straps\|Straps]] - OEM-level configuration		* [[NV3 configuration#Straps\|Straps]] - OEM-level configuration

			==See also==
			* [[STG-3001]]

	==Notes==		==Notes==

Starfrost at 12:00, 16 September 2025

2025-09-16T12:00:18Z

← Older revision		Revision as of 12:00, 16 September 2025
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	The 2D acceleration of the NV3 architecture provides full VGA, VBE 3.0, and accelerated 2D support, Windows GDI acceleration (including full GDI ternary bitblit ROP support), point, line and rectangle drawing, image rendering, screen to screen blit with up to four manipulatable buffers (although only two are used for this purpose in practice in the Nvidia drivers), image scaling and stretching, rendering at an 8 to 32 bits per pixel colour depth at a maximum theoretical resolution of 20481536 and maximum practical resolution of either 16001200 (NV3) or 1920*1200 (NV3T), although this requires reducing the colour depth to 16bpp or lower. Other supported features of the 2D graphics pipeline include colour conversion (including RGB10, YUV420 and 422, and palette-based colour formats), colour-expansion and downconversion, color-expanded bitblit for optimised text bitmap rendering, color key, plane mask and TV-out functionality with video overlay support (via the on-board "Mediaport"). Buffers can be anywhere in VRAM with any pitch and any supported colour format. The card's VGA support is provided via a modified Weitek VGA core that Nvidia licensed.		The 2D acceleration of the NV3 architecture provides full VGA, VBE 3.0, and accelerated 2D support, Windows GDI acceleration (including full GDI ternary bitblit ROP support), point, line and rectangle drawing, image rendering, screen to screen blit with up to four manipulatable buffers (although only two are used for this purpose in practice in the Nvidia drivers), image scaling and stretching, rendering at an 8 to 32 bits per pixel colour depth at a maximum theoretical resolution of 20481536 and maximum practical resolution of either 16001200 (NV3) or 1920*1200 (NV3T), although this requires reducing the colour depth to 16bpp or lower. Other supported features of the 2D graphics pipeline include colour conversion (including RGB10, YUV420 and 422, and palette-based colour formats), colour-expansion and downconversion, color-expanded bitblit for optimised text bitmap rendering, color key, plane mask and TV-out functionality with video overlay support (via the on-board "Mediaport"). Buffers can be anywhere in VRAM with any pitch and any supported colour format. The card's VGA support is provided via a modified Weitek VGA core that Nvidia licensed.

	There also exists within the NV3 architecture a fairly robust (for the time), mostly Direct3D 5.0-compliant and OpenGL 1.1 3D rendering implementation. Flat shading, gouraud shading, perspective-corrected (via submission of a homogenous 1/W value to the GPU to be used for perspective correction: the GPU will not perform this itself) bilinear-filtered texture mapping, per polygon and later per-pixel (with a driver update) mip-mapping, texture interpolation and wrapping (supported texture wrapping modes are clamping, mirroring and wrapping, and they can be set separately for both the U and V coordinate), most Direct3D 5.0 rendering ROPs (additive blending from the Direct3D 5.0 specification is missing and a few others), meshes, specular highlight, a 16-bit Z-~~buffer and 8-bit stencil~~ buffer (interleaved in what was called a "zeta buffer" for optimisation reasons), alpha-buffering for alpha blending, hardware fog (vertex fog - applying the fog colour and intensity at a vertex level - is implemented in hardware, whereas table fog - the slightly higher quality version where the fog colour is applied at output pixel levle - is emulated using vertex fog) with 24-bit fog colour; while triangle setup (span interpolation and similar operations) are accelerated, transformation and lighting{{ref\|a}} are not (this would have to wait for [[NV10]]). Most of the interface to the NV3's 3D engine is implemented via the <code>NV_D3D0Z</code> class; the interface to this class is via various methods for the control of all of the above features and then the submission of X, Y, Z, M (the aforementioned homogenous 1/W coordinte), U and V (for textures) coordinates for up to 128 triangles at a time. Although the output pixel format appears to be always 32-bit, only the 16-bit (not even 8-bit; the drivers convert any non 16-bit texture to 16-bit) <code>A4R4G4B4</code>, <code>A1R5G5B5</code>, <code>R5G5B5</code> and, via registry tweaks in the Direct3D driver, <code>R5G6B5</code> texture formats can be loaded; the largest texture size that can be loaded is 2048x2048, although in practice this is most likely done by splitting up the large texture into smaller textures, since a 2048x2048 texture (even at just 8bpp) is a minimum of 4 MB - too small to fit in the regular NV3 VRAM, and in a supported texture format will be 8 MB; too large for any variant of the NV3 architecture to support. Multitexturing is not supported; only a single texture can be supplied via the <code>NV_D3D0Z</code> class methods at a time. Up to 128 triangles can be submitted at a time, therefore it is a good idea to ensure the area covered by only one texture is close to a multiple of 128 while optimising for this graphics card.		There also exists within the NV3 architecture a fairly robust (for the time), mostly Direct3D 5.0-compliant and OpenGL 1.1 3D rendering implementation. Flat shading, gouraud shading, perspective-corrected (via submission of a homogenous 1/W value to the GPU to be used for perspective correction: the GPU will not perform this itself) bilinear-filtered texture mapping, per polygon and later per-pixel (with a driver update) mip-mapping, texture interpolation and wrapping (supported texture wrapping modes are clamping, mirroring and wrapping, and they can be set separately for both the U and V coordinate), most Direct3D 5.0 rendering ROPs (additive blending from the Direct3D 5.0 specification is missing and a few others), meshes, specular highlight, a 16-bit Z-buffer (interleaved in what was called a "zeta buffer" for optimisation reasons; a stencil buffer is also emulated in software), alpha-buffering for alpha blending, hardware fog (vertex fog - applying the fog colour and intensity at a vertex level - is implemented in hardware, whereas table fog - the slightly higher quality version where the fog colour is applied at output pixel levle - is emulated using vertex fog) with 24-bit fog colour; while triangle setup (span interpolation and similar operations) are accelerated, transformation and lighting{{ref\|a}} are not (this would have to wait for [[NV10]]). Most of the interface to the NV3's 3D engine is implemented via the <code>NV_D3D0Z</code> class; the interface to this class is via various methods for the control of all of the above features and then the submission of X, Y, Z, M (the aforementioned homogenous 1/W coordinte), U and V (for textures) coordinates for up to 128 triangles at a time. Although the output pixel format appears to be always 32-bit, only the 16-bit (not even 8-bit; the drivers convert any non 16-bit texture to 16-bit) <code>A4R4G4B4</code>, <code>A1R5G5B5</code>, <code>R5G5B5</code> and, via registry tweaks in the Direct3D driver, <code>R5G6B5</code> texture formats can be loaded; the largest texture size that can be loaded is 2048x2048, although in practice this is most likely done by splitting up the large texture into smaller textures, since a 2048x2048 texture (even at just 8bpp) is a minimum of 4 MB - too small to fit in the regular NV3 VRAM, and in a supported texture format will be 8 MB; too large for any variant of the NV3 architecture to support. Multitexturing is not supported; only a single texture can be supplied via the <code>NV_D3D0Z</code> class methods at a time. Up to 128 triangles can be submitted at a time, therefore it is a good idea to ensure the area covered by only one texture is close to a multiple of 128 while optimising for this graphics card.

	The PIO mode from the NV1 for object submission remains and is used for most basic 2D drivers, however a new DMA mode is added for faster object submission and higher three-dimensional graphics throughput.		The PIO mode from the NV1 for object submission remains and is used for most basic 2D drivers, however a new DMA mode is added for faster object submission and higher three-dimensional graphics throughput.

Starfrost at 11:59, 16 September 2025

2025-09-16T11:59:14Z

← Older revision		Revision as of 11:59, 16 September 2025
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	** [[NV3 PFB\|PFB]] - Framebuffer interface		** [[NV3 PFB\|PFB]] - Framebuffer interface
	** [[NV3 PGRAPH\|PGRAPH]] - 2D/3D graphics rendering engine (name comes from "Scene graph")		** [[NV3 PGRAPH\|PGRAPH]] - 2D/3D graphics rendering engine (name comes from "Scene graph")
	** [[NV3 PGRAPH#Cache\|PGRAPH_CACHE]] - Internal ~~texture~~ storage		** [[NV3 PGRAPH#Cache\|PGRAPH_CACHE]] - Internal vertex and pixel storage
	** [[NV3 Graphics objects\|Graphics objects]] - Available graphics objects		** [[NV3 Graphics objects\|Graphics objects]] - Available graphics objects
	** [[NV3 RAMIN\|RAMIN]] - Where graphics objects get stored		** [[NV3 RAMIN\|RAMIN]] - Where graphics objects get stored

Starfrost at 11:58, 16 September 2025

2025-09-16T11:58:47Z

← Older revision		Revision as of 11:58, 16 September 2025
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	** [[NV3 PFB\|PFB]] - Framebuffer interface		** [[NV3 PFB\|PFB]] - Framebuffer interface
	** [[NV3 PGRAPH\|PGRAPH]] - 2D/3D graphics rendering engine (name comes from "Scene graph")		** [[NV3 PGRAPH\|PGRAPH]] - 2D/3D graphics rendering engine (name comes from "Scene graph")
			** [[NV3 PGRAPH#Cache\|PGRAPH_CACHE]] - Internal texture storage
	** [[NV3 Graphics objects\|Graphics objects]] - Available graphics objects		** [[NV3 Graphics objects\|Graphics objects]] - Available graphics objects
	** [[NV3 RAMIN\|RAMIN]] - Where graphics objects get stored		** [[NV3 RAMIN\|RAMIN]] - Where graphics objects get stored
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	** [[NV3 Notification Engine\|Notification Engine]] - How to tell software the state of the hardware		** [[NV3 Notification Engine\|Notification Engine]] - How to tell software the state of the hardware
	** [[NV3 PRAMDAC\|PRAMDAC]] - RAMDAC for clocks, memory timings, CLUT, and sending the framebuffer to the TV or monitor		** [[NV3 PRAMDAC\|PRAMDAC]] - RAMDAC for clocks, memory timings, CLUT, and sending the framebuffer to the TV or monitor
	* [[NV3 DPRAM\|DPRAM]] - ~~On-die texture cache~~		* [[NV3 DPRAM\|DPRAM]] - Talk to VRAM
	* [[NV3 PVIDEO\|PVIDEO]] - Video overlay and control		* [[NV3 PVIDEO\|PVIDEO]] - Video overlay and control
	* [[NV3 PME\|PME]] - Mediaport - Lets you plug in an external MPEG decoder		* [[NV3 PME\|PME]] - Mediaport - Lets you plug in an external MPEG decoder

Starfrost at 21:39, 11 July 2025

2025-07-11T21:39:15Z

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	* [[PROM]] - Read from the Video BIOS		* [[PROM]] - Read from the Video BIOS
	* [[PDAC]] - Optional external DAC support		* [[PDAC]] - Optional external DAC support
	* [[NV3 configuration#PCI configuration registers]] - PCI configuration registers		* [[NV3 configuration#PCI configuration registers\|PCI configuration registers]] - PCI configuration registers
	* [[NV3 configuration#Manufacture-time configuration]] - Read the manufacturer, stepping, bus size, bus and more of your GPU		* [[NV3 configuration#Manufacture-time configuration\|Manufacture-time configuration]] - Read the manufacturer, stepping, bus size, bus and more of your GPU
	* [[NV3 configuration#Straps]] - OEM-level configuration		* [[NV3 configuration#Straps\|Straps]] - OEM-level configuration

Starfrost at 13:24, 30 June 2025

2025-06-30T13:24:39Z

← Older revision		Revision as of 13:24, 30 June 2025
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	** [[NV3 PGRAPH\|PGRAPH]] - 2D/3D graphics rendering engine (name comes from "Scene graph")		** [[NV3 PGRAPH\|PGRAPH]] - 2D/3D graphics rendering engine (name comes from "Scene graph")
	** [[NV3 Graphics objects\|Graphics objects]] - Available graphics objects		** [[NV3 Graphics objects\|Graphics objects]] - Available graphics objects
	** [[NV3 ~~PRAMIN~~\|RAMIN]] - Where graphics objects get stored		** [[NV3 RAMIN\|RAMIN]] - Where graphics objects get stored
	** [[NV3 RAMHT\|RAMHT]] - How you find graphics objects		** [[NV3 RAMHT\|RAMHT]] - How you find graphics objects
	** [[NV3 RAMFC\|RAMFC]] - Where the objects go for DMA context switching		** [[NV3 RAMFC\|RAMFC]] - Where the objects go for DMA context switching

Starfrost at 23:38, 31 May 2025

2025-05-31T23:38:06Z

← Older revision		Revision as of 23:38, 31 May 2025
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	* [[PROM]] - Read from the Video BIOS		* [[PROM]] - Read from the Video BIOS
	* [[PDAC]] - Optional external DAC support		* [[PDAC]] - Optional external DAC support
	* [[~~Configuration~~#Manufacture-time configuration]] - Read the manufacturer, stepping, bus size, bus and more of your GPU		* [[NV3 configuration#PCI configuration registers]] - PCI configuration registers
	* [[~~Configuration~~#Straps]] - OEM-level configuration		* [[NV3 configuration#Manufacture-time configuration]] - Read the manufacturer, stepping, bus size, bus and more of your GPU
			* [[NV3 configuration#Straps]] - OEM-level configuration

← Older revision		Revision as of 11:59, 16 September 2025
Line 53:		Line 53:
	** [[NV3 PFB\|PFB]] - Framebuffer interface		** [[NV3 PFB\|PFB]] - Framebuffer interface
	** [[NV3 PGRAPH\|PGRAPH]] - 2D/3D graphics rendering engine (name comes from "Scene graph")		** [[NV3 PGRAPH\|PGRAPH]] - 2D/3D graphics rendering engine (name comes from "Scene graph")
	** [[NV3 PGRAPH#Cache\|PGRAPH_CACHE]] - Internal ~~texture~~ storage		** [[NV3 PGRAPH#Cache\|PGRAPH_CACHE]] - Internal vertex and pixel storage
	** [[NV3 Graphics objects\|Graphics objects]] - Available graphics objects		** [[NV3 Graphics objects\|Graphics objects]] - Available graphics objects
	** [[NV3 RAMIN\|RAMIN]] - Where graphics objects get stored		** [[NV3 RAMIN\|RAMIN]] - Where graphics objects get stored

← Older revision		Revision as of 11:58, 16 September 2025
Line 53:		Line 53:
	** [[NV3 PFB\|PFB]] - Framebuffer interface		** [[NV3 PFB\|PFB]] - Framebuffer interface
	** [[NV3 PGRAPH\|PGRAPH]] - 2D/3D graphics rendering engine (name comes from "Scene graph")		** [[NV3 PGRAPH\|PGRAPH]] - 2D/3D graphics rendering engine (name comes from "Scene graph")
			** [[NV3 PGRAPH#Cache\|PGRAPH_CACHE]] - Internal texture storage
	** [[NV3 Graphics objects\|Graphics objects]] - Available graphics objects		** [[NV3 Graphics objects\|Graphics objects]] - Available graphics objects
	** [[NV3 RAMIN\|RAMIN]] - Where graphics objects get stored		** [[NV3 RAMIN\|RAMIN]] - Where graphics objects get stored
Line 61:		Line 62:
	** [[NV3 Notification Engine\|Notification Engine]] - How to tell software the state of the hardware		** [[NV3 Notification Engine\|Notification Engine]] - How to tell software the state of the hardware
	** [[NV3 PRAMDAC\|PRAMDAC]] - RAMDAC for clocks, memory timings, CLUT, and sending the framebuffer to the TV or monitor		** [[NV3 PRAMDAC\|PRAMDAC]] - RAMDAC for clocks, memory timings, CLUT, and sending the framebuffer to the TV or monitor
	* [[NV3 DPRAM\|DPRAM]] - ~~On-die texture cache~~		* [[NV3 DPRAM\|DPRAM]] - Talk to VRAM
	* [[NV3 PVIDEO\|PVIDEO]] - Video overlay and control		* [[NV3 PVIDEO\|PVIDEO]] - Video overlay and control
	* [[NV3 PME\|PME]] - Mediaport - Lets you plug in an external MPEG decoder		* [[NV3 PME\|PME]] - Mediaport - Lets you plug in an external MPEG decoder

← Older revision		Revision as of 13:24, 30 June 2025
Line 54:		Line 54:
	** [[NV3 PGRAPH\|PGRAPH]] - 2D/3D graphics rendering engine (name comes from "Scene graph")		** [[NV3 PGRAPH\|PGRAPH]] - 2D/3D graphics rendering engine (name comes from "Scene graph")
	** [[NV3 Graphics objects\|Graphics objects]] - Available graphics objects		** [[NV3 Graphics objects\|Graphics objects]] - Available graphics objects
	** [[NV3 ~~PRAMIN~~\|RAMIN]] - Where graphics objects get stored		** [[NV3 RAMIN\|RAMIN]] - Where graphics objects get stored
	** [[NV3 RAMHT\|RAMHT]] - How you find graphics objects		** [[NV3 RAMHT\|RAMHT]] - How you find graphics objects
	** [[NV3 RAMFC\|RAMFC]] - Where the objects go for DMA context switching		** [[NV3 RAMFC\|RAMFC]] - Where the objects go for DMA context switching