MediaWiki API result
This is the HTML representation of the JSON format. HTML is good for debugging, but is unsuitable for application use.
Specify the format parameter to change the output format. To see the non-HTML representation of the JSON format, set format=json.
See the complete documentation, or the API help for more information.
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{
"logid": 71,
"ns": 0,
"title": "NV3 memory mapping",
"pageid": 65,
"logpage": 65,
"revid": 208,
"params": {},
"type": "create",
"action": "create",
"user": "Starfrost",
"timestamp": "2025-05-23T01:25:08Z",
"comment": "Created page with \"Understanding the memory mapping of the NV3 is critical for understanding its overall operation. The memory mapping architecture is implemented internally by the NV3 on-die memory controller and exposed to the user via the configuration register interface of the Peripheral Connect Interface (PCI) bus and its siblings and successors, such as AGP (or in later models, PCIe). Two of the maximum six base address registers are exposed via the configuration registers, BAR0 and...\""
},
{
"logid": 70,
"ns": 0,
"title": "Emulation status",
"pageid": 64,
"logpage": 64,
"revid": 165,
"params": {},
"type": "create",
"action": "create",
"user": "Starfrost",
"timestamp": "2025-05-07T15:14:32Z",
"comment": "Created page with \"This page details the emulation status for various NVIDIA GPUs. == NV3 == Emulation is '''partially working'''. Most of the pipeline exists, the GPU is detected and drivers initialise on all known supported operating systems, and 2D partially works. However, serious issues understanding the screen to screen blit behaiour are preventing this part from working. Additionally, the DMA engine, required for 3D, is not yet emulated correctly. == NV4 == Very early research and...\""
},
{
"logid": 69,
"ns": 0,
"title": "NV3 PMC",
"pageid": 63,
"logpage": 63,
"revid": 162,
"params": {},
"type": "create",
"action": "create",
"user": "Starfrost",
"timestamp": "2025-05-06T01:39:41Z",
"comment": "Created page with \"'''PMC''' ('''M'''aster '''C'''ontrol) is the subsystem that controls all of the other subsystems within Nvidia-based GPUs. The NV3 version is fairly basic: it stores some manufacture-time configuration info, allows disabling and enabling interrupts, reading and writing interrupt status and enabling and disabling most other subsystems.\""
},
{
"logid": 68,
"ns": 2,
"title": "User:LavillPrils",
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"logpage": 0,
"params": {
"userid": 7
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"type": "newusers",
"action": "create",
"user": "LavillPrils",
"timestamp": "2025-04-30T19:32:42Z",
"comment": ""
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{
"logid": 67,
"ns": 2,
"title": "User:Alice",
"pageid": 0,
"logpage": 0,
"params": {
"userid": 4
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"type": "newusers",
"action": "create",
"user": "Alice",
"timestamp": "2025-04-28T05:05:50Z",
"comment": ""
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{
"logid": 66,
"ns": 2,
"title": "User:TestUser",
"pageid": 0,
"logpage": 0,
"params": {
"userid": 5
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"type": "newusers",
"action": "create",
"user": "TestUser",
"timestamp": "2025-04-28T05:05:50Z",
"comment": ""
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{
"logid": 65,
"ns": 0,
"title": "PTIMER",
"pageid": 62,
"logpage": 62,
"revid": 149,
"params": {},
"type": "create",
"action": "create",
"user": "Starfrost",
"timestamp": "2025-04-28T00:03:11Z",
"comment": "Created page with \"'''PTIMER''' is a [[hardware subsystem]] that implements a 56-bit programmable interval timer with nanosecond-ish accuracy (it counts in nanoseconds, but cannot be nanosecond accurate due to the clock speed) and controllable speed. It is a foundational component of all Nvidia GPUs and, at least for late 1990s and early 2000s GPU designs, has not changed a huge amount (although some new registers have been added) since the [[NV1]]. It is required to, among other things, f...\""
},
{
"logid": 64,
"ns": 0,
"title": "Hardware errata",
"pageid": 61,
"logpage": 61,
"revid": 142,
"params": {},
"type": "create",
"action": "create",
"user": "Starfrost",
"timestamp": "2025-04-27T22:38:50Z",
"comment": "Created page with \"This is a list of known hardware errata in Nvidia graphics cards == Shared across multiple GPUs == == NV3 == === Early VBIOS bugs === While not technically a hardware errata, most likely due to an unknown issue with the video BIOS code in certain very early NVidia RIVA 128 units, certain VGA functions are broken. This causes garbage characters to appear inside of the Windows 98 Startup menu while trying to boot from CD-ROM. This bug is known to exist in very early S...\""
},
{
"logid": 63,
"ns": 0,
"title": "Software",
"pageid": 60,
"logpage": 60,
"revid": 118,
"params": {},
"type": "create",
"action": "create",
"user": "Starfrost",
"timestamp": "2025-04-20T15:28:29Z",
"comment": "Created page with \"Nvidia has produced many pieces of '''software''' for users of their graphics cards. The main piece of software required is their drivers: they are required to make the GPU function at all, beyond the very basic (VGA, VESA, or Windows Advanced Rasterisation Platform - WARP in Windows 7 and later) level of compatibility assured for all forms of graphical hardware that are supported by Windows; any Nvidia-specific features require their drivers to be installed on the syste...\""
},
{
"logid": 62,
"ns": 10,
"title": "Template:Ref label",
"pageid": 59,
"logpage": 59,
"revid": 116,
"params": {},
"type": "create",
"action": "create",
"user": "Starfrost",
"timestamp": "2025-04-20T15:18:32Z",
"comment": "Created page with \"<sup class=\"plainlinks nourlexpansion citation\" {{#ifeq:{{{noid}}}|noid||id=\"ref_{{{1}}}\"}}>{{#if:{{{2|}}}|[[#endnote_{{{1}}}|{{{2}}}]]|[{{fullurl:{{FULLPAGENAME}}}}#endnote_{{anchorencode:{{{1|}}}}}]}}</sup><noinclude> {{documentation}} <!-- Add categories to the /doc subpage; interwikis go to Wikidata, thank you! --> </noinclude>\""
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